Intel Xeon dual processor 3.06/1MB cache tested

Dom · Aug 30, 2003, 06:53 AM

INCREASING THE dual-CPU XeonDP cache size - or, in essence, reusing the large-cache XeonMP as XeonDP here - was part of Intel's answer to the Opteron arrival. Xeon does suffer from much lower memory bandwidth than the Opteron, and that difference grows quickly as you add CPUs, since Xeons share a common FSB in an SMP system, while Opterons have individual low-latency memory buses on each processor, aggregating the total memory bandwidth (but also arising potential cache coherency and memory speed consistency problems).

So, before the next-generation Nocona and Potomac Xeons arrive, hopefully with 800 MHz FSB at least for DP systems, the simplest solution was to increase the on-chip cache amount by using the already proven Gallatin XeonMP core - its entry-level variety which, besides the usual 512K L2 cache, also has a 1 MB L3 on-chip (but with higher latency than the L2 cache).

With the help of Intel Asia Pacific, we set up a nice reference system with dual 3.06 GHz XeonDP CPUs, intel Bryson server mainoaup to 2 GB DDR266 registered RAM, and Linux as well as WindowsXP running on it, with the relevant Intel (and M$) compilers.

The goal of the test was a bit unusual compared to the common server CPU reviews. We noticed that Intel CPUs have very high SPECmarks these days - Xeon is pretty much the SPECint leader, and its SPECfp scores are also pretty impressive for a CPU with just 8 FP registers (whether in X87 or SSE mode). So we decided to take the actual SPEC2000 v1.2 source code, and try our best with it.

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DriveEuro · Aug 31, 2003, 07:43 AM

This should be a killer system considering that I've read a review of a dual xeon for gaming before and the results were promising.

Aug 30, 2003, 06:53 AM	#1
Dom DriverHeaven Extreme Member Join Date: Jun 2002 Posts: 12,940 Rep Power: 0	Intel Xeon dual processor 3.06/1MB cache tested INCREASING THE dual-CPU XeonDP cache size - or, in essence, reusing the large-cache XeonMP as XeonDP here - was part of Intel's answer to the Opteron arrival. Xeon does suffer from much lower memory bandwidth than the Opteron, and that difference grows quickly as you add CPUs, since Xeons share a common FSB in an SMP system, while Opterons have individual low-latency memory buses on each processor, aggregating the total memory bandwidth (but also arising potential cache coherency and memory speed consistency problems). So, before the next-generation Nocona and Potomac Xeons arrive, hopefully with 800 MHz FSB at least for DP systems, the simplest solution was to increase the on-chip cache amount by using the already proven Gallatin XeonMP core - its entry-level variety which, besides the usual 512K L2 cache, also has a 1 MB L3 on-chip (but with higher latency than the L2 cache). With the help of Intel Asia Pacific, we set up a nice reference system with dual 3.06 GHz XeonDP CPUs, intel Bryson server mainoaup to 2 GB DDR266 registered RAM, and Linux as well as WindowsXP running on it, with the relevant Intel (and M$) compilers. The goal of the test was a bit unusual compared to the common server CPU reviews. We noticed that Intel CPUs have very high SPECmarks these days - Xeon is pretty much the SPECint leader, and its SPECfp scores are also pretty impressive for a CPU with just 8 FP registers (whether in X87 or SSE mode). So we decided to take the actual SPEC2000 v1.2 source code, and try our best with it. Read More...

Aug 31, 2003, 07:43 AM	#2
DriveEuro HardwareHeaven Extreme Member Join Date: Jul 2002 Location: Gurnee Illinois Posts: 4,677 Rep Power: 0	This should be a killer system considering that I've read a review of a dual xeon for gaming before and the results were promising. __________________ [color=orange]ASUS P4P800 Deluxe [color=black]-[/color] 2.4C --> 3300mhz [color=black]-[/color] Mushkin PC3200 at 220 5-2-2-2 (cpu limited) [color=black]-[/color] BBAti 9800Pro at 430/375 [/color] [color=black]3[/color][color=gray]D[/color]M[color=black]a[/color][color=gray]r[/color]k[color=yellow]01[/color] [color=black]3[/color][color=gray]D[/color]M[color=black]a[/color][color=gray]r[/color]k[color=yellow]03[/color] 16001200 12801024