RightMark Memory Analyzer 3.3

**MIG-31** · Aug 7, 2004, 08:26 AM

RightMark Memory Analyzer 3.3, the universal CPU/Chipset/RAM experimental test suite has been released! RightMark Memory Analyzer provides stable and accurate measurements of the most important low-level characteristics of the CPU/Chipset/RAM subsystem of your PC. Seven types of tests are implemented in the current release of the RightMark Memory Analyzer suite, that allow you to determine the following low-level parameters of the platform:

-Average and peak memory bandwidth;
-Average and minimal L1/L2 data cache/memory latency;
-L1/L2 data cache associativity;
-L1-L2 data cache bus bandwidth;
-D-TLB size and associativity (of each level);
-L1 instructions cache size (including the "effective" size) and associativity;
-Decode efficiency of various simple x86 (ALU/FPU/MMX) instructions;
-I-TLB size and associativity (of each level).

Download: cpu.rightmark.org

~~BMG_Cya=-~~ · Aug 7, 2004, 08:37 AM

Got an error of "Unsupported South Bridge Chip"...on an Nforce 2 MSI-ILSR Ultra?

Programs like this...

Judas · Aug 7, 2004, 05:38 PM

it's not considered finish..... why would you be upset

Aug 7, 2004, 08:26 AM	#1
MIG-31 HardwareHeaven News Mod Join Date: Dec 2002 Location: Nottingham,UK Posts: 56,854 Rep Power: 471 System Specs	RightMark Memory Analyzer 3.3 RightMark Memory Analyzer 3.3, the universal CPU/Chipset/RAM experimental test suite has been released! RightMark Memory Analyzer provides stable and accurate measurements of the most important low-level characteristics of the CPU/Chipset/RAM subsystem of your PC. Seven types of tests are implemented in the current release of the RightMark Memory Analyzer suite, that allow you to determine the following low-level parameters of the platform: -Average and peak memory bandwidth; -Average and minimal L1/L2 data cache/memory latency; -L1/L2 data cache associativity; -L1-L2 data cache bus bandwidth; -D-TLB size and associativity (of each level); -L1 instructions cache size (including the "effective" size) and associativity; -Decode efficiency of various simple x86 (ALU/FPU/MMX) instructions; -I-TLB size and associativity (of each level). Download: cpu.rightmark.org

Aug 7, 2004, 08:37 AM	#2
~~BMG_Cya=-~~ Banned Join Date: Mar 2003 Location: U.S.A. Posts: 718 Rep Power: 0	Got an error of "Unsupported South Bridge Chip"...on an Nforce 2 MSI-ILSR Ultra? Programs like this...