Japanese researchers unveil 3-D stack for chip integration

Vikingod · Dec 7, 2005, 02:23 PM

Japanese researchers have come up with a new three-dimensional integration technology called Super-Smart-Stack that uses a self-assembly technique to maintain chip alignment accuracy to within 1 micron.

The details of the process, delivered Tuesday (Dec. 6) at the International Electron Devices Meeting (IEDM) here, portends the use of the self-assembly technique to stack various chips types with different sizes and thicknesses. Most are fabricated using different process technologies.

In order to dramatically improve the overall yield for 3-D chips, it is preferable to stack known-good dice (KGDs) as opposed to chip on chip. Researchers at Tohoku University in Japan proposed vertically stacked KGDs in a batch, where many KGDs are temporarily glued to a wafer using the self-assembly technique. Wafers are then stacked with many KGDs.
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Read More / Source: EETimes

Dec 7, 2005, 02:23 PM	#1
Vikingod Int'l Fish Liaison Join Date: Jul 2004 Location: By the light of lamp I sit and type... Posts: 16,197 Rep Power: 112 System Specs	Japanese researchers unveil 3-D stack for chip integration Japanese researchers have come up with a new three-dimensional integration technology called Super-Smart-Stack that uses a self-assembly technique to maintain chip alignment accuracy to within 1 micron. The details of the process, delivered Tuesday (Dec. 6) at the International Electron Devices Meeting (IEDM) here, portends the use of the self-assembly technique to stack various chips types with different sizes and thicknesses. Most are fabricated using different process technologies. In order to dramatically improve the overall yield for 3-D chips, it is preferable to stack known-good dice (KGDs) as opposed to chip on chip. Researchers at Tohoku University in Japan proposed vertically stacked KGDs in a batch, where many KGDs are temporarily glued to a wafer using the self-assembly technique. Wafers are then stacked with many KGDs. __________ Read More / Source: EETimes